A High-Speed Clockless Serial Link Transceiver (Electrical/Electronics Project)

We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by using multiplexing transmitters and demultiplexing receivers that interface parallel on-chip data paths with high-speed, serial off-chip buses. While synchronous transceivers commonly use multi-phase clocks to control the data multiplexing and demultiplexing, our clockless transceiver uses a […]

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Bio-inspired VLSI Systems: from Synapse to Behavior (Electronics Project)

We investigate VLSI systems using biological computational principles. The elegance of biological systems throughout the structure levels provides possible solutions to many engineering challenges. Specifically, we investigate neural systems at the synaptic level and at the sensorimotor integration level, which inspire our similar implementations in silicon. For both VLSI systems, we use floating gate MOSFETs in standard CMOS processes as […]

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VLSI Design of Rank-Order Filtering using DCRAM (Electronics Project)

This paper addresses on VLSI design of rank-order filtering (ROF) with a maskable memory for realtime speech and image processing applications. Based on a generic bit-sliced ROF algorithm, the proposed design uses a special-defined memory, called the dual-cell random-access memory (DCRAM), to realize major operations of ROF: threshold decomposition and polarization. Using the memory-oriented architecture, the proposed ROF processor can […]

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VLSI Design of Heart Model (Electronics Project)

Heart disease is a leading cause of death in the United States and abroad. Research interests arise in understanding the nature of the dynamics of the heart and seeking methods to control and suppress arrhythmia. Simulation of the heart electrical activity is a useful approach to study the heart because it yields some quantities of interest that cannot practically be […]

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VLSI Implementation of Key Components in A Mobile Broadband Receiver

Digital front-end and Turbo decoder are the two key components in the digital wireless communication system. This thesis will discuss the implementation issues of both digital front-end and Turbo decoder. The structure of digital front-end for multi-standard radio supporting wireless standards such as IEEE802.11n, WiMAX, 3GPP LTE is investigated in the thesis. A top-to-down design methods. 802.11n digital down-converter is […]

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